C++生成文件错误 - 没有规则使目标'%.cpp'

C++ Makefile error - No rule to make target '%.cpp'

本文关键字:目标 cpp 有规则 文件 错误 C++      更新时间:2023-10-16

你好,我正在运行一个教程来编写我自己的makefile,我在这里找到了教程:

http://www.cs.colby.edu/maxwell/courses/tutorials/maketutor/

我知道本教程是针对C的makefiles,但是我相信C和c++之间的相似之处意味着makefiles的功能几乎没有区别(例如,我使用的是g++而不是gcc)。我希望我在这一点上的假设不是一个因素,因为前面的4个教程似乎都工作得很好。

当在教程中运行Makefile 5时,我得到了一个关于从.cpp文件构建对象文件的错误:

make: *** No rule to make target '%.cpp', needed by 'obj'. Stop.

我似乎不明白为什么会发生这种情况,非常令人困惑和沮丧,因为我觉得这不应该发生。我将完整的Makefile包含在下面,任何帮助都将非常感谢:

 # Example Makefile                                                                                                                                                                                             
 # ----------------
 # Please remember to turn off the vim option: 'expandtab' so that tabs are 
 # actually displayed as tabs (do so like this - :set noexpandtab )
 #
 # This file specifies dependencies, which means that the two c++ files must
 # be compiled before the executable is built
 # ------------------
 # Makefile Constants
 # ------------------
 # Directory constants
 IDIR =../include  # Specifies location of include directory
 ODIR =obj        # Specifies location of object directory
 LDIR =../lib      # Specifies location of library directory
 LIBS=-lm  # ?
 # Options constants
 CC=g++            # Specifies the specific C compiler to use, g++ specifies C++ compiler
 CFLAGS=-I$(IDIR)  # List of flags to pass to compilation command
 # Dependency Constants
 DEP_FILES=helloMake.h                      # Specifies dependency files
 DEPS=$(patsubst %,$(IDIR)/%,$(DEP_FILES))  # Specifies path to dependencies and dependency files
 # Object constants
 OBJ_FILES=helloMake.o helloFunc.o         # Specify object files
 OBJ=$(patsubst %,$(ODIR)/%,$(OBJ_FILES))  # Specifies path to objects and object files

 # -----------
 # Compilation
 # -----------
 # Specify rules to make object files
 $(ODIR)/%.o: %.cpp $(DEPS)       # Specifies that .o files depend on the .cpp version of the file and the .h files included in the DEPS macro
     $(CC) -c -o $@ $< $(CFLAGS)  # The -c flag says to generate the object file, the -o $@ says to put the output of the compilation in the
                                  # file named on the left side of the : the $< is the first item in the dependencies list
 # Specify rules to make target executable
 helloMake: $(OBJ)                     # Target : Dependencies
     $(CC) -o $@ $^ $(CFLAGS) $(LIBS)  # This is the actual compilation command
 .PHONY: clean  # Prevent the make command from attempting to do something with a file named 'clean'
 # Specify rules to clean the object files
 clean:
     rm -f $(ODIR)/*.o *~ core $(INCDIR)/*~  # Removes all compiled object files

这个"简单"的教程不幸地助长了不良实践。

基本上,你首先需要一个正确的C Makefile:
# Specify the final target name
EXE := helloMake
# Specify the source files
# Effectively list all source files in the current directory
SRC := $(wildcard *.c)
# From the source file list, get the corresponding object file list
# This is a clearer syntax for $(patsubst %.c,%.o,$(SRC))
OBJ := $(SRC:.c=.o)
# From the object file list, get the dependency file list to handle automatic
# recompilation when a header file is modified
DEP := $(OBJ:.o=.d)
# Specify preprocessor flags (this is a built-in variable)
CPPFLAGS := -I../include
# Required flags to enable the automatic dependency generation by the compiler
CPPFLAGS += -MMD -MP
# Specify compiler flags (this is a built-in variable)
# Here some basic warning flags
CFLAGS := -Wall -W -pedantic
# Specify linker flags (this is a built-in variable)
LDFLAGS := -L../lib
# Specify linker libraries (this is a built-in variable)
# m is the maths library
LDLIBS := -lm
# Tell make that these target are not real files
.PHONY: all clean
# Now the standard primary rule
all: $(EXE)
# How do we make $(EXE) ? Remember the recipe describe the linking phase
$(EXE): $(OBJ)
    $(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
# Let's clean up the mess
clean:
    $(RM) $(EXE) $(OBJ) $(DEP)
# Don't forget to include the dependency files to let make know when to recompile
-include $(DEP)

那么你需要知道C Makefile和c++ Makefile之间的区别:

  • 使用$(CXX)代替$(CC)
  • 使用$(CXXFLAGS)代替$(CFLAGS)
  • 使用.cpp代替.c

你完成了。

# Specify the final target name
EXE := helloMake
# Specify the source files
# Effectively list all source files in the current directory
SRC := $(wildcard *.cpp)
# From the source file list, get the corresponding object file list
# This is a clearer syntax for $(patsubst %.cpp,%.o,$(SRC))
OBJ := $(SRC:.cpp=.o)
# From the object file list, get the dependency file list to handle automatic
# recompilation when a header file is modified
DEP := $(OBJ:.o=.d)
# Specify preprocessor flags (this is a built-in variable)
CPPFLAGS := -I../include
# Required flags to enable the automatic dependency generation by the compiler
CPPFLAGS += -MMD -MP
# Specify compiler flags (this is a built-in variable)
# Here some basic warning flags
CXXFLAGS := -Wall -W -pedantic
# Specify linker flags (this is a built-in variable)
LDFLAGS := -L../lib
# Specify linker libraries (this is a built-in variable)
# m is the maths library
LDLIBS := -lm
# Tell make that these target are not real files
.PHONY: all clean
# Now the standard primary rule
all: $(EXE)
# How do we make $(EXE) ? Remember the recipe describe the linking phase
$(EXE): $(OBJ)
    $(CXX) $(LDFLAGS) $^ $(LDLIBS) -o $@
# Let's clean up the mess
clean:
    $(RM) $(EXE) $(OBJ) $(DEP)
# Don't forget to include the dependency files to let make know when to recompile
-include $(DEP)

编辑:为了能够重新定位构建文件(.o.d文件),您需要进行一些调整:

# Specify the final target name
EXE := helloMake
# Specify the source files
# Effectively list all source files in the current directory
SRC := $(wildcard *.cpp)
# Specify where to put the build temporary files
BLD := obj
# From the source file list, get the corresponding object file list
# This is a clearer syntax for $(patsubst %.cpp,$(BLD)/%.o,$(SRC))
OBJ := $(SRC:%.cpp=$(BLD)/%.o)
# From the object file list, get the dependency file list to handle automatic
# recompilation when a header file is modified
DEP := $(OBJ:.o=.d)
# Specify preprocessor flags (this is a built-in variable)
CPPFLAGS := -I../include
# Required flags to enable the automatic dependency generation by the compiler
CPPFLAGS += -MMD -MP
# Specify compiler flags (this is a built-in variable)
# Here some basic warning flags
CXXFLAGS := -Wall -W -pedantic
# Specify linker flags (this is a built-in variable)
LDFLAGS := -L../lib
# Specify linker libraries (this is a built-in variable)
# m is the maths library
LDLIBS := -lm
# Tell make that these target are not real files
.PHONY: all clean
# Now the standard primary rule
all: $(EXE)
# How do we make $(EXE) ? Remember the recipe describe the linking phase
$(EXE): $(OBJ)
    $(CXX) $(LDFLAGS) $^ $(LDLIBS) -o $@
# The build directory is custom so we need to tell make how to do it
# The build directory must exist before trying to compile
$(BLD)/%.o: %.cpp | $(BLD)
    $(CXX) $(CPPFLAGS) $(CXXFLAGS) -o $@ -c $<
# Simple rule to create the build directory if needed
$(BLD):
    mkdir $@
# Let's clean up the mess, we can just remove the build directory alonside the executable
clean:
    $(RM) -r $(BLD) $(EXE)
# Don't forget to include the dependency files to let make know when to recompile
-include $(DEP)

%语法不是标准的make,而是由例如GNU make提供的扩展功能(否则,您必须为每个源文件编写特定的规则或使用类似autotools的东西,生成巨大的(但可移植)Makefile s)。所以,您应该确保使用make实用程序支持这一点。如果这不是问题,您确定在当前目录中实际上有*.cpp文件吗?